In base stations of mobile communication, terrestrial digital broadcasting, and the like, a frequency reference signal is required to have high frequency stability. A standard signal is obtained from a cesium frequency standard oscillator, a rubidium standard oscillator, and the like, but since the standard signal thereof generally costs high, each of the base stations distributes the standard signal when using it. The distributed standard signal is used, for example, as a reference signal for phase comparison of a PLL circuit, and from this PLL circuit, a reference signal such as, for example, a reference clock signal with a required frequency can be obtained.
As shown in FIG. 14, generally, in a PLL circuit, a phase comparator 104 compares a standard signal 101 and a signal that a frequency divider circuit 103 obtains by frequency-dividing an output signal of a voltage-controlled oscillator 102, and a charge pump 105 gives a signal according to a phase difference between these signals and supplies its output to the voltage-controlled oscillator 102 via a loop filter 106, whereby the PLL circuit performs PLL control to generate a high-accuracy signal.
If the standard signal led in from an external part (external reference frequency signal) disappears, an output frequency jumps, and in a case where the PLL circuit is used in a transmitting apparatus of a broadcasting station and the output signal that the voltage-controlled oscillator outputs for a distribution image is synchronized with the standard signal, the disappearance, even if it is instantaneous, forces self-dependent voltage control, and because the frequency stability of the voltage control is not very high, there occurs a broadcasting trouble.
Possible factors causing the disappearance of the standard signal are deterioration of a cable, a connection trouble of a connector of a cable, a maintenance operator's mistaken touch of a part that should not be touched, and the like. Further, besides the disappearance of the standard signal, a decrease in level of the standard signal sometimes occurs due to the deterioration of a cable, which also poses a problem of the disturbance of the output frequency because a proper phase difference cannot be extracted.
There has been an increasing demand for higher accuracy of a frequency reference signal in, for example, a base station. For example, the present inventor has been trying to develop a frequency synthesizer having frequency resolution in a 1 Hz unit or lower, but a reference clock signal in such an apparatus needs to have extremely high frequency stability, and a conventional PLL circuit has difficulty in satisfying this requirement.
Further, a patent document 1 describes a technique for a PLL circuit in which a frequency adjustment and calculation circuit outputs a control value based on a phase comparison result so that a phase difference becomes zero, the control value is periodically written into a memory, and an upper limit and a lower limit of a control range are found based on a +control value and a −control value which are set in advance, with the written control value as a mid value, thereby enabling accurate output of a synchronizing clock even if stability of a reference clock lowers. Similarly to the present invention, this technique adopts a method in which a value calculated in the middle of a PLL loop is stored in the memory and this value is read, but this technique is totally different from the present invention in its object and its way of configuring the method, and cannot solve the aforesaid problems.
Patent Document 1
Japanese Patent Application Laid-open No. 2002-353807